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NEUROMATRIX® NM6403 DSP SDK

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NeuroMatrix® NM6403 RISC/DSP Microprocessor NM6403

To order: please e-mail sales @ module.ru

NeuroMatrix® NM6403 is a high performance dual-core microprocessor with combination of VLIW/SIMD architectures. The architecture includes two main units: 32-bit RISC Core and 64-bit VECTOR co-processor to support vector operations with elements of variable bit length (Patent US 6,539,368 B1). There are two identical programmable interfaces to work with any memory types as well as two communication ports hardware compatible with TI DSP TMS320C4x which permit to build multi- processor systems.

Features:

  • clock frequency - 40 MHz (25ns instruction cycle time);
  • Technology used CMOS 0.5 mkm.;
  • BGA256 package;
  • low voltage operation, from 3.0 V to 3.6 V;
  • power consumption @50 MHz about 1.6 W;
  • temperature range: -60...+85 C.
RISC-Core
  • 5-stage pipelined 32-bit RISC;
  • processor instructions are 32 and 64 bit wide (usually two operations are executed by each instruction);
  • two address generation units, address space - 16 GB;
  • two 64 bit programmable interfaces with SRAM/DRAM shared memory;
  • data format: 32-bit digit integers;
  • registers:
    • 8 of 32 bit general purpose registers;
    • 8 of 32 bit address registers;
    • special control and state registers;
  • two high speed I/O communication ports of a byte width hardware compatible with those of TMS320C4x.

VECTOR co-processor

  • 1-64 bit word length of vector operands and the products;
  • data format: integer data packed into 64-bit blocks in the form of variable length words from 1 to 64 bits each;
  • hardware support of vector-matrix or matrix-matrix multiplication;
  • On-chip saturation functions;
  • On-chip three 32*64 bit RAM blocks.

Applications:

  • accelerators for PCs and workstations for:
    • neural net emulation;
    • signal processing;
    • image processing;
    • acceleration of vector and matrix calculations;
  • telecommunications;
  • embedded systems;
  • basic block for building large super parallel computing systems.

Performance:

  • scalar operations:
    • 40 MIPS;
    • 120 MOPS for 32 bit data;
  • vector operations:
    • from 40 to 11.500+ MMAC (million multiplication and accumulation per second);
  • I/O and interfaces:
    • two programmable external memory 64 bit interfaces have up to 800 MB/sec. throughput;
    • I/O communication ports up to 20 MB/sec. throughput each.

Documentation

Hardware
  NM6403 Information Sheet   PDF, 320 KB
431282.001D3 NM6403 Datasheet v.1.0 PDF, 511 KB
431282.001D2 NM6403 Architectural Overview v.1.2 PDF, 265 KB
Silicon Intellectual Property
431283.001D1 NeuroMatrix® Core Information Sheet   PDF, 79 KB
431283.001D7 NeuroMatrix® RISC Core: Architectural Brief v.1.1 PDF, 201 KB
  VLIW/SIMD NeuroMatrix® Core   PDF, 51 KB
Software
  Software Development Kit Overview   PDF, 20 KB
30002-01 35 02 A NM6403 Assembly Language Overview prelim. PDF, 1.36 MB
Application Notes
  NeuroMatrix® Engine v.1.1 PDF, 56 KB
  Using of NM6403 for Neural Net Emulation   PDF, 109 KB
  Neural Network Example Application Report (source files - nm6403nnetsrc-e.zip)   PDF, 73 KB
  Fast Hadamard Transform Application Report (source files - nm6403fhtsrc-e.exe)   PDF, 133 KB
  Equalizers of the FUL DFE(N,M) Family on the NM6403 Processor   PDF, 160 KB
  Effective Implementation of Convolution Filters on NeuroMatrix® Core   PDF, 78 KB
  Parallel Execution of FFT Algorithms on NeuroMatrix® Architecture   PDF, 132 KB
30002-01 33 02 A Getting Started with NM6403 (source files - nm6403_getst_src-e.zip) v.1.1 PDF, 478 KB
  Approaches to Implementation of Image Compression Algorithms on NeuroMatrix® Architecture   PDF, 348 KB
Libraries
  NeuroMatrix Processing Library (NMPL)    

Benchmarks

Processor Type Sobel Transform
(Frame Size: 384x288 bytes)
256-point FFT
(32-bit data)
Intel,
Pentium II, 300 MHz
N/A 200 usec.
Intel,
Pentium, 200 MHz
21 frames/sec N/A
Texas Instruments,
TMS320C40, 50 MHz
6.80 frames/sec 464 usec.
(11588 cycles)
RC "Module",
NM6403, 40 MHz
68 frames/sec 102 usec.
(4070 cycles)

Processor Type Hadamard Transform
(21 step, Initial Data: 5 bit)
Forward Propagation
(1024 layers, 1024 neurons/layer)
Intel,
Pentium II, 300 MHz
2.58 sec N/A
Intel,
Pentium, 200 MHz
2.80 sec N/A
Texas Instruments,
TMS320C40, 50 MHz
N/A N/A
RC "Module",
NM6403, 40 MHz
0.45 sec 1.54 sec

Fixed Points DSP's - nm6403dspcomp-e.pdf

Digital Neural Networks in VLSI - nm6403nccomp-e.pdf

NeuroMatrix® NM6403 neuroprocessor performance evaluation report -nm6403tms-e.pdf

FFT Processors Comparison (Bevan Baas at Space, Telecommunications, and Radioscience Laboratory, Stanford University)

Software Development Tools

Demo version of NeuroMatrixR NM6403 SDK v.1.21. available FREE of charge!

It includes:

  • PC-based simulator
  • compiler and debugging tools
  • examples of programs on NM6403 DSP with comprehensive comments

To download the demo version of NeuroMatrixR NM6403 SDK v.1.21 please visit our download center.

In addition to demo SDK the Professional SDK version includes:

  • debug target - hardware debugger (this component is a DLL for using with C source debugger);
  • drivers for Win95, NT;
  • load and exchange library;
  • 1 year technical support (free software upgrade, e-mail consulting).

If you have any questions concerning SDK (bug reports, technical questions and so on) please send us your information to nm-support @ module.ru.

Hardware Applications

  • NeuroMatrix® MC431 Single-DSP PCI Evaluation Board    New
  • NeuroMatrix® BM1 PCI/CompactPCI Video Image Processing (VIP) Development Set
  • NeuroMatrix® NM4 Multi-DSP CompactPCI Board

To order: please e-mail sales @ module.ru

Module® and NeuroMatrix® are registered
trademarks of Research Center "Module".
All other trademarks are the exclusive property
of their respective owners.

© RC Module 2011